RM0393. 167p
9.3 DMA functional description
9.3.1 General description
9.3.2 DMA transactions
9.3.3 Channel selection
9.3.4 Arbiter
9.3.5 DMA streams
9.3.6 Source, destination and transfer modes
9.3.7 Pointer incrementation
9.3.8 Circular mode
9.3.9 Double buffer mode
9.3.10 Programmable data width, packing/unpacking, endianess
9.3.11 Single and burst transfers
9.3.12 FIFO
FIFO structure
- The FIFO is used to temporarily store data coming from the source before transmitting them to the destination
FIFO threshold and burst configuration
9.3.13 DMA transfer completion
9.3.14 DMA transter suspension
9.3.15 Flow controller
9.3.16 Summary of the possible DMA configurations
9.3.17 Stream configuration procedure
9.3.18 Error management
